SyntheSys Research CR12500A Overview
Features:
- Instrumentation quality clock recovery
- 150 Mb/s–12.5 Gb/s continuous data rate coverage
- Accurate variable loop bandwidth from 100 kHz to 12 MHz
- Auto lock capability with LED display
- Programmable peaking adjustment with first and second order rolloff capability
- Self-measured and displayed PLL frequency response
- USB control connection to BERTScope or stand alone operation via front panel
- Single-ended or differential 50 O inputs/outputs
- DC coupled data through path data
- Full and divided clock outputs with selectable divide ratios
- Measurement of clock phase deviation as a function of frequency and time
- Data measurement capability
- Edge Density Measurement —determine the mark density of the signal under test
- Ideal for spread spectrum clock (SSC) applications with large frequency excursions